A Physically-Based Behavioral Snapback Model

Transcription

1 A Physically-Based Behavioral Snapback Model Richard da and Colin C. McAndrew Freescale Semiconducor, 2100 E. Ellio Road, M/S EL344, Tempe, AZ USA el.: (480) , fax: (480) , Absrac - This paper presens an accurae and robus model for snapback in ESD clamps. mpac ionizaion, which riggers snapback, akes ime o occur; our model inroduces a behavioral ime-dependen low resisance on-sae curren ha, like real devices, smoohly and coninuously urns on and off, hereby eliminaing convergence issues during simulaion.. nroducion ESD proecion devices commonly snapback from a high resisance (blocking, or off) sae o a low resisance (conducing, or on) sae during response o an EOS even. To evaluae he ESD robusness of a clamp coupled wih circuiry, and o help debug failures, a circui level clamp model is needed. However, because he ransiion from high o low resisances saes involves a region of negaive differenial resisance (NDR) here are ofen convergence issues during simulaion of snapback evens. Alhough dedicaed simulaion algorihms have been developed for robus snapback simulaion [1][2] hese are no generally available in commercial circui simulaors, so he responsibiliy for enabling robus circui simulaion falls o he models. Effecive circui level ESD simulaion ideally is based on compuaionally efficien, robus, and easy o characerize models. Exising circui level clamp models are generally of wo ypes; physically-based, deailed compac models, e.g. [3][4][5]; or behavioral models. e.g. [6][7]. Deailed compac models, e.g. [8], capure he device physics ha underlie snapback, bu can sill have convergence problems and require exracion of many more parameers han are needed for modeling he ESD proecion behavior of he device. Exising behavioral models use echniques ha work around NDR and disconinuiies, bu do no properly model he ime dependence of he snapback even and so canno accuraely model overshoo behavior of ESD clamps. This paper presens a behavioral ESD clamp snapback model ha is developed based on he qualiaive device physics of snapback, is parameerized in erms of simple, easy o measure parameers ha characerize he snapback even, and smoohly and coninuously varies wih ime. This enables robus simulaion of snapback evens ha accuraely model overshoo behavior. The model is coded in Verilog-A, and verified agains measured ransien overshoo responses o varying pulse magniudes in a 50 Ω TLP es sysem. sae sae Fig. 1. nernal sae delay model.. Basic Modeling Approach When snapback occurs, high applied volage causes impac ionizaion, which riggers bipolar urn-on, which in urn causes a clamp o swich from is blocking sae o is on sae; he on sae hen persiss unil he curren hrough he device reduces below a holding value. A key observaion is ha impac ionizaion does no happen insananeously (alhough all compac models assume ha i does): f a high field is suddenly applied o a device, mobile charge carriers ake ime o gain sufficien energy from he field o be able o iniiae ionizaion evens (hey need o ravel a disance of order of he mean free pah for opical phonon scaering [9]); hey also need ime o ravel hrough he device. These delays in esablishmen of impac ionizaion curren are leveraged in high-power RF BJT circuis, which can ransienly have volage swings beyond breakdown, bu come back ou of ha

2 region of operaion so quickly ha he devices do no snapback or go ino avalanche breakdown. From measured daa, he on sae curren can be simply characerized by a holding volage V H [6] and an on-sae conducance G on, (1) V ) = G ( V V ). on ( on H Raher han swiching his curren on insananeously, an inernal sae variable sae [0,1 ] is inroduced, and a relaxaion ime delay model is implemened o ransienly and smoohly swich sae beween is off and on values, 0 and 1, respecively, see Fig. 1. When he volage across he clamp exceeds he snapback rigger volage V T1 he value of he curren source sae driving he delay nework in Fig. 1 is se o 1 μa (he 10 6 facors in he elemens of Fig. 1 are used o scale curren values so ha hey align wih ypical convergence olerances used in circui simulaors). When he volage across he clamp drops below V H he value of sae in Fig. 1 is rese o zero. The value of he dimensionless variable sae (which is reaed as a volage by he simulaor) is compued during circui simulaion from he soluion of (2) 6 sae sae = 10 sae + τ which varies from 0 o 1. The ime delay τ models he ime for impac ionizaion o build up and for mobile charges carriers o ransi hrough he device, and sae is hen used as a muliplicaive facor for on ; he curren in he clamp is jus sae on. Alhough he curren source sae in Fig. 1 swiches insananeously, he response of sae does no; i varies coninuously in ime, hereby providing a smooh ransiion beween blocking and conducing saes for he clamp, wih a swiching delay ime conrollable via he value of τ. Fig. 2 shows he basic snapback modeling capabiliies of our model. The accuracy is clear, and unlike deailed compac models, which can require complex procedures for parameer exracion, our model is direcly parameerized in erms of V T1, V H, and G on, which can be easily and direcly deermined from he measured snapback curve in Fig. 2. (Our snapback model is also parameerized in erms of τ, deails of which are given in he nex secion, bu τ is deermined from ransien measuremens of he snapback behavior of he clamp; he model characerisics in Fig. 2 are from he saic dc behavior of he model, which does no depend on τ, only on V T1, V H, and G on ). Fig. 2. Basic TLP (V ) characerisic of new model.. Model Deails Besides he snapback model, proper represenaion of a complee clamp requires modeling of he off sae curren, he device capaciance, and τ. The off sae curren is essenially from juncion leakage, and i is modeled as max( V,0) off ( S 1+ VD V φ (3) V ) = ( 1 e ) Here φ = kt q is he hermal volage, he parameer S is he sauraion curren, and he parameer V D models he modulaion of reverse juncion curren by he movemen of he posiion of he depleion region edge wih bias (noe ha in he form (3) he juncionlike curren is in reverse bias for posiive V ; heoreically he oal hickness of he depleion region, and hence he leakage curren, is proporional o φ bi + V [10], where φ bi is he buil-in juncion poenial, bu for simpliciy of implemenaion his is mapped o he form in (3) so ha he normal characerisic of he juncion curren is recovered under forward bias, and V D is aken o be a parameer ha is deermined from fiing experimenal daa, so VD = φbi is no calculaed from he juncion doping). Fig. 3 shows he characerisics of he model (3) (he breakdown region is no imporan for modeling snapback behavior and so, for efficiency, is no included in our model); again, he accuracy is clear. Noe ha in our implemenaion he on sae curren is no direcly riggered by volage bu by curren; he snapback curren T1 used as he hreshold o rigger urn on of he on sae curren is easily calculaed from (3) knowing he parameers V T1, S, and V D..

3 Besides he delay in he build-up of impac ionizaion, here is also a finie ransi ime for carriers hrough he clamp. For bipolar operaion, he uniy gain ransiion frequency is (6) ω T g = C m oal φ C + τ φ B Fig. 3. Off sae leakage curren model. The device capaciance is modeled as an effecive juncion capaciance (4) C ( ) = J0 C V 1 + V V J M J where C J 0 is he zero-bias capaciance, V J is he buil-in poenial, and M J is he grading coefficien. This is acually implemened via a charge 1 CJ VJ V (5) Q( V) = 0 M J V J whose derivaive wih respec o volage V gives (4). When he forward bias exceeds F CVJ, where 0 F C < 1 is an addiional model parameer, he capaciance is modeled as being linear in V. Fig. 4 shows he fi of he model (4) o measured daa. M J where is he curren flowing hrough he device, g m is he ransconducance, and τ B is he base ransi ime. The reciprocal of (6) is an effecive ransi ime hrough he device. By adding his ransi ime o he impac ionizaion iniiaion delay ime τ ii, we model an effecive bias dependen overall delay ime for he urn on of he snapback behavior as 1+ τ XT (7) τ = 0 XT where XT = 1 ( φc) and τ 0 = τ ii + τ B are model parameers, which are deermined from he ransien response of he clamp. Fig. 5 shows he complee model, where he ime dependen quaniy sae is deermined from he auxiliary circui of Fig. 1. Fig. 5. Complee clamp model ( sae from Fig. 1). Fig. 4. Capaciance model.. Transien Clamp Response To verify our model we compare i o he ransien response of a clamp subjeced o pulses of differen magniudes. The measuremens were done in a 50 Ω TLP es environmen a room emperaure. The clamp is a zener riggered npn srucure in a 70 V 0.25 μm smar power BiCMOS process [11], and wo of he srucures were sacked ogeher in series o provide a 48 V clamp [12], see Fig. 6. Fig. 7 shows simulaed versus measured ransien response curves for varying pulse heigh, and Fig. 8 shows an expanded view of he iniial response.

4 pos neg Fig. 6. Schemaic of he clamp. Fig. 7. Measured and modeled clamp ransien response. Fig. 8. Enlargemen of iniial porion of Fig. 7. The overshoo behavior of he clamp is capured by our model; his deail is no simulaed properly by previous behavioral models. Noe he faser response ime for increasing pulse heigh; his is because higher erminal currens decrease he effecive delay ime hrough he clamp, which is capured in our model hrough he curren dependen delay ime of (7). Conclusions We have presened a new model for circui level simulaion of snapback in ESD clamps. The model converges reliably, causing no simulaion problems, physically represens wha is happening during impac ionizaion riggered snapback, and is parameerized in erms of easily exracable elecrical parameers ha represen device behavior and conrol circui performance. We verified our model by comparison o measured daa of overshoo responses o TLP pulses of varying magniude. We have applied he ime delayed on-sae urn on model o a bipolar ransisor based clamp, bu expec ha i should be applicable o MOS ransisor based clamps as well, because heir snapback behavior is also deermined by urn on of a parasiic bipolar ransisor. References [1] C. H. Diaz and S.-M. Kang, New algorihms for circui simulaion of device breakdown, EEE Trans. CAD, vol. 11, no. 11, pp , Nov [2] C. Jiao and Z. Yu, A robus novel echnique for SPCE simulaion of ESD snapback characerisic, EEE CSCT, pp , [3] Y. Zhou, D. Connerney, R. Carroll, and T. Luk, Modeling MOS snapback for circui-level ESD simulaion using BSM3 and VBC models, EEE SQED, pp , [4] Y. Zhou, J.-J. Hajjar, A. W. Righer, and K. P. Lisiak, Modeling snapback of LVTSCR devices for ESD circui simulaion using advanced BJT and MOS models, EOS/ESD, pp , [5] A. Ramanujan, M. Kadi, J. Tremenber, F. Lafon, and B. Mazari, Modeling C snapback characerisics under elecrosaic discharge sress, EEE Trans. EMC, vol. 51, no. 4, pp , [6] P. A. Juliano and E. Rosenbaum, A novel SCR macromodel ofr ESD circui simulaion, Tech. Dig. EDM, pp., , 2001.

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