Dr.Rohit Lorenzo. years. NIT Delhi ECE Assistant Professor. PhD [Full-time] Research Supervisor: Dr.Saurabh Chaudhury

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1 Dr.Rohit Lorenzo Mobile : rohit.lorenzo@gmail.com CARRIER OBJECTIVE Looking for a position in an organization, where my engineering, teaching and research skills will support to provide quality services and also a chance to explore my carrier. EXPERIENCE Organization Depart Designation Job type From To Total ment NIT Delhi ECE Assistant Teaching 25/7/17 Continuing MIET Meerut ECE Associate Teaching 2/8/16 12/6/17 11 month (UP) Invertis University, Bareilly(UP) ECE Assistant Teaching 1/7/ 11 30/7/12 1.1yrs NIT Kurukshetra ECE Assistant Teaching 3/1/11 30/6/11 6 month Invertis University, Bareilly(UP) ECE Assistant Teaching 7/11/08 30/12/ years ACADEMIC STATUS PhD [Full-time] From National Institute of Technology Silchar (Assam). Degree awarded on 25 may 2017 Research Topic: Design and Simulation of Some Leakage minimization schemes for CMOS VLSI circuits and systems Research Supervisor: Dr.Saurabh Chaudhury Master of Engineering in VLSI Design [Full time] From Karunya University, Coimbatore (TN) ( )

2 Bachelor of Technology in Electronics& Communication Engineering [Full time] From U.P Technical University, Lucknow (U.P) ( ) Higher Secondary certificate [Full-time] From ST.Paul s Inter Collage Shahjahanpur U.P board ( 2001) AISSE (10th) [Full-time] From ST.Paul s Inter Collage Shahjahanpur U.P board (1999) AREA OF Research Low power VLSI Design SKILL SETS Front end tools:- HDL Languages : VHDL,Verilog HDL Design and simulation : Xilinx ISE, Model sim, Altera-Quartus II Synthesis : Leonardo Spectrum and HDL designer Back end tools:- MENTOR GRAPHICS IC nanometer design, TANNER EDA and Microwind COMPUTER PROFICIENCY Languages Operating Systems : C and C++ : Window 7 and Linux CERTIFICATION C and C++ certifications done from aptech computer education shahjahanpur (UP) BOOK CHAPTER Authored Rohit Lorenzo and Saurabh Chaudhury, Leakage minimization in CMOS VLSI circuits A brief review included in book title Design and modeling of Low power VLSI systems circuit devices and system IGI global, pp , JOURNAL PUBLICATION 1. Rohit Lorenzo and Saurabh Chaudhury, A Novel 9T SRAM Architecture for Low Leakage and High Performance, Analog Integrated Circuits and Signal Processing, springer, Vol. 92, No. 2, pp ISSN: , 31 May 2017 [SCI] DOI : /s Rohit Lorenzo and Saurabh Chaudhury, LCNT-An Approach to Minimize Leakage Power in CMOS Integrated Circuits, Microsystems Technologies, springer, May ISSN: [SCI]. DOI:

3 3. Rohit Lorenzo and Saurabh Chaudhury, Optimal body bias to control stability, leakage and speed in SRAM cell, Journal of circuit system and computers, World Scientific, Vol. 25, No. 8, pp. 1-15, April ISSN: [SCI] DOI: 4. Rohit Lorenzo and Saurabh Chaudhury, Review of circuit level leakage minimization technique in VLSI circuits, IETE Technical review, Taylor and Francis, Vol.34, No.2,pp , April ISSN: [SCI] DOI: 5. Rohit Lorenzo and Saurabh Chaudhury, Dynamic Threshold Sleep Transistor Technique for High Speed and Low Leakage in CMOS circuits, Circuit system and signal processing, Springer. Vol.36, No.7, pp OCT ISSN: X [SCI] DOI: /s Rohit Lorenzo and Saurabh Chaudhury, A Novel SRAM cell Design with a Body-bias Controller Circuit for Low Leakage, High Speed and Improved Stability, wireless personal communication, Springer. Vol.94 No.2, pp , sept ISSN: [SCI] DOI: /s PAPER PRESENTED IN CONFERENCES 1. Rohit Lorenzo and Saurabh Chaudhury, A New body biasing technique for leakage minimization in CMOS VLSI circuits 4th International conference on computing, communication and sensor network, Kolkata, Dec 2015 organized by International association of science technology and management. 2. Rohit Lorenzo and Saurabh Chaudhury, A New circuit technique to minimize leakage power in CMOS VLSI circuit 2 nd international conference on VLSI Circuit and System, July, Rohit Lorenzo and Saurabh Chaudhury, Low leakage and minimum energy consumption in CMOS logic circuits International conference on electronic design computer networks & automated verification 29-30Jan 2015 organized by National Institute of Technology, Meghalaya.(IEEE explore) 4. Rohit Lorenzo, Saurabh Chaudhury, Sakshi Devi and Avtar Singh, Comparative study of Single Gate And Double Gate Fully Depleted Silicon on Insulator MOSFET Communication, Control and Intelligent Systems, 7-8 Nov 2015, Organized by GLA University (IEEE Xplore) 5. Rohit Lorenzo and Saurabh Chaudhury, A Novel body bias controller for low leakage, high speed and improved stability SRAM cell Design 3 rd International conference on computing, communication and sensor network12-14 Dec 2014 organized by Purushottam Institute of engineering and Technology, Rourkela (Odisha). 6. Rohit Lorenzo and Saurabh Chaudhury, A New Ultra low leakage and high speed technique for CMOS circuits Students conference on engineering and Systems May 2014 organized by Motilal Nehru National Institute of Technology, Allahabad (UP). (IEEE explore) 7. Rohit Lorenzo and Saurabh Chaudhury, A Novel PMOS Data Retention Leakage Power Reduction Design Proceedings of International conference on communications systems and Network Technologies 7-9April 2014 organized by National Institute of Technical Teachers Training & Research,Bhopal (MP).(IEEE explore) 8. Rohit Lorenzo and Saurabh Chaudhury, Analysis of leakage feedback techniques Proceedings of International conference on Electronics communication and Instrumentation

4 January 2014 organized by Heritage Institute of Technology, Kolkata (WB). (IEEE explore) 9. Rohit Lorenzo and Saurabh Chaudhury, A Novel all NMOS leakage feedback with data retention technique Proceedings of IEEE sponsored International conference on Control, Automation, Robotics and Embedded system 16-18December 2013 organized by PDPM IIITDM Jabalpur (MP). (IEEE Explore) 10. Rohit Lorenzo and Nikhil Raj, Page no An Effective Design Technique to Reduce Leakage Power Proceedings of IEEE conference on Electrical, Electronics and Computer Science,1-2 march 2012 organized by Maulana Azad National Institute of Technology,Bhopal (MP). (IEEE Explore) 11. Rohit Lorenzo and O.P.Sahu A New Approach to reduce Power Dissipation in BIST in International conference on Communication, Computers and Devices, ICCCD, December 2010 Organized by department of Electronics And Electrical Communication, IIT Karaghpur (West Bengal) 12. Rohit Lorenzo Design of a low static power CMOS circuit Proceedings of National Symposium on Instrumentation -36, Oct 2011 jointly organized by INSTRUMENT SOCIETY OF INDIA, Department of Instrumentation, IISc Bangalore and Invertis University, Bareilly. 13. Rohit Lorenzo and O.P Sahu page no , Minimum Switching Activity in BIST,Proceedings of National Conference on VLSI, MEMS & NEMS,VMN 10,23-24 September 2010, Amity University, Noida (UP) India. 14. Rohit Lorenzo,Tarun Dubey and O.P Sahu, Self Localization Method of Wireless Sensor Network, 5 April 2009, National Seminar on Wireless Sensor Network,SRMSCET,Bareilly (UP),India. 15. Rohit Lorenzo and Amir Anton Jone, VL. 19, page no.95-98, A BIST for Low power dissipation, Proceedings of National Conference on VLSI for Communication,Computation and Control VCCC 08, 15 March 2008, Karunya University,Coimbatore (TN),India. WORKSHOP ATTENDED 1. Attended Workshop on Human Value and Professional Ethics organized by AKTU at MIET Meerut, held on 3-10 Jan, Attended TEQIP sponsored short term course on Implementation of image processing using Lab view organized by Department of Electrical Engineering, NIT Silchar, held on February, Attended TEQIP sponsored short term course on Application of soft computing technique in engineering organized by Department of Civil Engineering, NIT Silchar, held on 9-11 November, Attended TEQIP sponsored short term course on MEMS & SENSORS organized by Department of Electronics & Communication Engineering, NIT Silchar, held on sept, Attended TEQIP sponsored short term course on Microcontroller and PLC Programming & Application organized by Department of Electronics & Instrumentation Engineering, NIT Silchar, held on April, Attended TEQIP sponsored short term course on Basics of Lab view organized by Department of Electrical Engineering, NIT Silchar, held on Nov, 2012.

5 7. Attended TEQIP sponsored short term course on Application of embedded system in various fields of electronics organized by Department of Electronics and communication Engineering, NIT Silchar, held on September, Attended QIP AICTE sponsored short term course on Power Transformer : Trends in Design, Analysis, Protection and Condition Monitoring, organized by Department of Electrical Engineering, IIT Roorkee, held on 4-8 June, Attended QIP AICTE Sponsored short term course on Design Issues For VLSI and Nanoscale circuits and systems organized by Department of Electronics & Computer Engineering, IIT Roorkee (Uttarakhand), held on June, Attended workshop on High Impact Teaching Skills organized by Wipro mission 10x, Invertis Institute of Engineering & Technology, Barielly (UP), held on 5-10 march, Attended Workshop on MATLAB & SIMULINK organized by Department of Electrical Engineering, NIT Rourkela (Orissa), held on August,2009 STRENGTH Positive attitude Determination, Capable of adapting new environment Amicable REVIEWER OF JOURNAL International Journal of Electronics (Taylor and Francis) International Journal of Electronics Letter (Taylor and Francis) Analog Integrated Circuits and Signal Processing (Springer) IEEE transaction on VLSI IETE Technical review (Taylor and Francis) IET computer and Digital Technique PERSONAL PROFILE Name : Rohit Lorenzo Date of Birth : Father s name : Mr. A.K. Lorenzo Sex : Male Marital Status : Married Languages Known : English and Hindi Nationality : Indian Corresponding Address : Rohit Lorenzo H.No. 85/368 Dilazak Cantt Near Police line (Immambara), Shahjahanpur (UP)

6 LIST OF REFEREES Dr. Saurabh Chaudhury Associate & HOD Department of Electrical Engineering NIT Silchar (Assam) Tel: Dr. N.B.Dev Choudhury Associate Department of Electrical Engineering NIT Silchar (Assam) Tel: Dr. Y.D.S Arya Pro-Vice Chancellor Invertis University, Bareilly (UP) Tel: Dr. Santanu Chattopadhyay Dept. of Electronics & Electrical Comm. Engg. Indian Institute of Technology Kharagpur West Bengal India santanu@ece.iitkgp.ernet.in, iitkgp.santanu@gmail.com Phone: (O), (R), (M) Fax: